Have just upgraded our terminal server from 2GB of ram to 4GB of ram. The bios sees all 4096MB during post, but after windows 2003 has loaded a quick check on task manager and only 3.5GB is being used by windows. Anyway of getting the missing 512MB to be used by windows.

Previously all 2GB was available so I know its not a shared memory issue.

After some digging aroun the interweb, it would seem I need to download a bios update and run the server in PAE mode, using the /PAE option in boot.ini

I have downloaded and installed the new bios, added the /PAE switch. Now all I need to do is reboot when I get a timeslot on the server.

I wonder why /PAE is needed though, especially as the standard 2003 server edition supposedly supports 4GB of ram.

Mannyo,

Some of that memory addresses will be being used for various functions of your PCI cards so it is unlikely that you will ever see all 4GB. PAE might get you most of it back so it's worth a shot

It's all to do with the way the 32bit version of windows works with Intel processors.

Physical Address Extension - Wikipedia, the free encyclopedia

Auroan, some chipset's use the block at the top of the physically addressable RAM to do PCI stuff, which knocks off some of this RAM.

This might not be entirely to do with that, however there are many chipsets, especially those for AMD systems, that use the memory address like this.

Auroan, some chipset's use the block at the top of the physically addressable RAM to do PCI stuff, which knocks off some of this RAM.

This might not be entirely to do with that, however there are many chipsets, especially those for AMD systems, that use the memory address like this.

Never heard of this before, where'd you get this info from ?

Have just upgraded our terminal server from 2GB of ram to 4GB of ram. The bios sees all 4096MB during post, but after windows 2003 has loaded a quick check on task manager and only 3.5GB is being used by windows. Anyway of getting the missing 512MB to be used by windows.

Previously all 2GB was available so I know its not a shared memory issue.

Hello Manny!

This is one of Raymond Chen's pet topics. Have a read of this.

Never heard of this before, where'd you get this info from ?

It's a reasonably common implementation in chipsets for the PCI/PCI-X system allows memory mapped transfers for DMA, the hardware's own BIOS and other similar functions.

hmmm I was under the impression that the PCI bus memory mapping was just another description of its advanced IO address mapping, and that it didn't actually use the memory, but instead used the address of the memory as a a quicker virtual IO. Obviously this means that the memory may be excluded from the OS for use, but with PAE what you are basically doing is creating a virtual memory map, which allows you to create a virtual address register.

This virtual map allows you to overcome the issue you mentioned allowing the full access to 4gb of ram or more ?

hmmm I was under the impression that the PCI bus memory mapping was just another description of its advanced IO address mapping, and that it didn't actually use the memory, but instead used the address of the memory as a a quicker virtual IO. Obviously this means that the memory may be excluded from the OS for use, but with PAE what you are basically doing is creating a virtual memory map, which allows you to create a virtual address register.

This virtual map allows you to overcome the issue you mentioned allowing the full access to 4gb of ram or more ?

The PCI devices use the addresses not the RAM, but some implementations don't like the PCI devices to be above 4GB, some insist that their BIOS be copied into the system RAM, these are the ones that will mean you might not actually see all the RAM.

When doing DMA you can do a copy from mem address x (the PCI device) to mem address y (The real RAM)

You are correct in saying that PAE will get you around this (or most of it), but there is a slight performance hit as obviously you have just added another layer between the real RAM and the CPU.

Don't think I can agree with you on that. PAE doesn't move the reserved address space for PCI/DMA etc, it allows the OS to use the RAM that's been re-allocated / mapped "above" the 4gb thats been displaced.

Also I've yet to see a modern Xeon based system slow down due to /PAE switch. May be on older Pentiums but Xeons have a TLB.

"The processor has a Translation Lookaside Buffer which contains recent virtual to physical mappings. This is a hardware circuit that searches all entries in parallel, rather than sequentially, so in most cases there is no delay to physical memory access (from paging support, at least). I don't think PAE affects the efficiency of the TLB at all - all TLB entries are the same width regardless of whether the processor is in PAE mode or not."

The writer doesn't think the TLB is affected. That all depends on the efficiency of the algorithm in hardware doing the caching of the address lookups.

Also when you context switch to a separate process you end up flushing the TLB and at this point there will be a slight hit on the performance. You might not usually see it but it is there if you are unlucky enough to get hit by it.

All PAE does is allow the system to access more RAM addresses, where the PCI devices are mapped to is up to the hardware, and where within that address block is down to the software (OS/BIOS) and the drivers etc. The start address for that PCI device is then specified in the BAR on the PCI device.

Physical Address Extension - Wikipedia, the free encyclopedia

Are we saying the same thing using different words ?

Read the link I posted above. Raymond even draws a diagram for the hard-of-thinking

Are we saying the same thing using different words ?

Sounds like it.

Certainly on the PCI side I would consider myself an expert.

As you say I think what you are saying is the same as my understanding of the spec just phrased differently.

Read the link I posted above. Raymond even draws a diagram for the hard-of-thinking

What you mean by that then?

Back to the topic....

Mannyo, the easiest way to get around this problem is to make sure your next system is of a 64bit architecture.

so MIPS64, IA64, x86_64, SPARC64 etc.

The PAE switch may or may not work depending on your hardware, and the OS and the drivers that you are using within the OS.

What you mean by that then?

Oops just that the diagram might stop the fighting over terminology.

Oh, and returning to the topic, I don't think you're even necessarily safe if you get a 64 bit processor. Some Dells are supplied with Core IIs which will install 64-bit operating systems but are controlled by an Intel 945 chipset (32 bit) and don't have the PAE lines wired in :(

Oops just that the diagram might stop the fighting over terminology.

No fight, this is one of those subject areas where I can debate the PCI/PCIe spec with almost anyone and win

Oh, and returning to the topic, I don't think you're even necessarily safe if you get a 64 bit processor. Some Dells are supplied with Core IIs which will install 64-bit operating systems but are controlled by an Intel 945 chipset (32 bit) and don't have the PAE lines wired in :(

Yes, but I was talking real 64 bit systems and if intel/amd ones then ones that were fully 64bit. The server mobo's will have chipsets that allow enhanced memory addressing or they would be fairly pointless servers

Thanks for all the info. Not had a chance to reboot yet, hopefully it will be fine.

The server is our main terminal server and runs a few legacy apps that dont run under x64. One supplier had to write a special version of their software for us, as it didnt work under TS.

Hmm if the app doesn't work under x64, I'd be prepared for things to possibly break under PAE.

Good luck